World’s fastest memory writes 25 billion bits per sec, 10,000× faster than current tech
Aresearch team at Fudan University has built the fastest semiconductor storage device ever reported, a non‑volatile flash memory dubbed “PoX” that programs a single bit in 400 picoseconds (0.0000000004 s) — roughly 25 billion operations per second. The result, published today in Nature, pushes non‑volatile memory to a speed domain previously reserved for the quickest volatile memories and sets a benchmark for data‑hungry AI hardware.
Smashing the speed ceiling
Conventional static and dynamic RAM (SRAM, DRAM) write data in 1–10 nanoseconds but lose everything when power is cut. Flash chips, by contrast, hold data without power yet typically need micro‑ to milliseconds per write — far too slow for
modern AI accelerators that shunt terabytes of parameters in real time.
The Fudan group, led by Prof. Zhou Peng at the State Key Laboratory of Integrated Chips and Systems, re‑engineered flash physics by replacing silicon channels with two‑dimensional Dirac graphene and exploiting its ballistic charge transport.
By tuning the “Gaussian length” of the channel, the team achieved two‑dimensional super‑injection, which is an effectively limitless charge surge into the storage layer that bypasses the classical injection bottleneck.
“Using AI‑driven process optimization, we drove non‑volatile memory to its theoretical limit,” Zhou told Xinhua, adding that the feat “paves the way for future high‑speed flash memory.”
One billion cycles in a blink
Co‑author Liu Chunsen likens the breakthrough to shifting from a U‑disk that writes 1,000 times per second to a chip that fires 1 billion times in the blink of an eye. The previous world record for non‑volatile flash programming speed was about two million operations per second.
Because PoX is non‑volatile, it retains data with no standby power, a critical property for next‑generation edge AI and
battery‑constrained systems. Combining ultra‑low energy with picosecond write speeds could remove the long‑standing memory bottleneck in AI inference and training hardware, where data shuttling, not arithmetic, now dominates power budgets.
Industrial and strategic implications
Flash memory remains a cornerstone of global semiconductor strategy thanks to its cost and scalability. Fudan’s advance, reviewers say, offers a “completely original mechanism” that may disrupt that landscape.
If mass‑produced, PoX‑style memory could eliminate separate high‑speed SRAM caches in AI chips, slashing area and energy. It can enable instant‑on, low‑power
laptops and phones, and support database engines that hold entire working sets in persistent RAM.
The device can also strengthen China’s domestic drive to secure leadership in foundational
chip technologies. The team did not disclose endurance figures or fabrication yield, but the graphene channel suggests compatibility with existing 2D‑material processes that global fabs are already exploring. “Our breakthrough can reshape storage technology, drive industrial upgrades and open new application scenarios,” Zhou said.
What happens next
Fudan engineers are now scaling the cell architecture and pursuing array‑level demonstrations. Commercial partners have not been named, but Chinese foundries are racing to integrate 2D materials with mainstream CMOS lines.
If successful, PoX could come in as a new class of ultra‑fast, ultra‑green memories that meet the swelling appetite of large‑language‑model accelerators, finally giving AI hardware a storage medium that keeps pace with its logic.
PoX is a new class of ultra‑fast, ultra‑green memories that meet the swelling appetite of large‑language‑model accelerators.
interestingengineering.com
Prof. Zhou Peng Fudan University
Subnanosecond flash memory enabled by 2D-enhanced hot-carrier injection
Abstract
The pursuit of non-volatile memory with program speeds below one nanosecond, beyond the capabilities of non-volatile flash and high-speed volatile static random-access memory, remains a longstanding challenge in the field of memory technology
1. Utilizing fundamental physics innovation enabled by advanced materials, series of emerging memories
2,
3,
4,
5 are being developed to overcome the speed bottleneck of non-volatile memory. As the most extensively applied non-volatile memory, the speed of flash is limited by the low efficiency of the electric-field-assisted program, with reported speeds
6,
7,
8,
9,
10 much slower than sub-one nanosecond. Here we report a two-dimensional Dirac graphene-channel flash memory based on a two-dimensional-enhanced hot-carrier-injection mechanism, supporting both electron and hole injection. The Dirac channel flash shows a program speed of 400 picoseconds, non-volatile storage and robust endurance over 5.5 × 106 cycles. Our results confirm that the thin-body channel can optimize the horizontal electric-field (
Ey) distribution, and the improved
Ey-assisted program efficiency increases the injection current to 60.4 pA μm−1 at |
VDS| = 3.7 V. We also find that the two-dimensional semiconductor tungsten diselenide has two-dimensional-enhanced hot-hole injection, but with different injection behaviour. This work demonstrates that the speed of non-volatile flash memory can exceed that of the fastest volatile static random-access memory with the same channel length.
A two-dimensional Dirac graphene-channel flash memory based on a two-dimensional-enhanced hot-carrier-injection mechanism that supports both electron and hole injection is used to make devices with a subnanosecond program speed.
www.nature.com
In-memory ferroelectric differentiator
Abstract
Differential calculus is the cornerstone of many disciplines, spanning the breadth of modern mathematics, physics, computer science, and engineering. Its applications are fundamental to theoretical progress and practical solutions. However, the current state of digital differential technology often requires complex implementations, which struggle to meet the extensive demands of the ubiquitous edge computing in the intelligence age. To face these challenges, we propose an in-memory differential computation that capitalizes on the dynamic behavior of ferroelectric domain reversal to efficiently extract information differences. This strategy produces differential information directly within the memory itself, which considerably reduces the volume of data transmission and operational energy consumption. We successfully illustrate the effectiveness of this technique in a variety of tasks, including derivative function solving, the moving object extraction and image discrepancy identification, using an in-memory differentiator constructed with a crossbar array of 1600-unit ferroelectric polymer capacitors. Our research offers an efficient hardware analogue differential computing, which is crucial for accelerating mathematical processing and real-time visual feedback systems.
Here, authors develop an in-memory differentiator using a 40×40 array of ferroelectric capacitors. This device efficiently performs real-time differential computation and motion extraction, demonstrating low energy consumption and high operational frequency, with potential applications in edge...
www.nature.com
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